Principles and Concepts
- Verify transaction functional correctness with the following approaches
- constrained-randomization
- coverage driven
- transaction-level compartment
- Use sequences
- Use scoreboard
- Use configuration-db
- Use SystemVerilog to provide aggregate types for transaction storage and search
- Dynamic Arrays, Associative Arrays, Queues, Classes
- UVM analysis ports is easier to use than callbacks
- UVM_transaction provides compare() / do_compare() methods
- UVM factor for extension, replacement and reuse.
Plan of Attack
- Analysis_port
- port, export and imp classes used for transaction analysis
- uvm_analysis_port - broadcasts a value to all subscribers implementing a uvm_analysis_imp
- uvm_analysis_imp - receives all transactions broadcasted by a uvm_analysis_port.
- Transaction Predictor
- Required when the compared transaction is not the same format as input (ex. protocol bridges)
- Design transforms data (ex. encryption, filter, encoder)
- To Re-Use
- encapsulation : a separate class
- uvm_analysis_port / imp to connect
- UVM factory to extend, replace existing objects
- Replace complex predictors with several simpler scoreboards
- Storage (for read scoreboard and for write scoreboard)
- FIFO : queues
- OOO : dynamic arrays, queues
- MEM : associative array (indexed by address)
- Associative array of queues
- TLM Model
- Used when you have multiple different transaction paths/routes
- Used when behavior depends on the address or opcodes or other attributes of transactions
- Using Factory
- Interconnect
- Automate by Randomization
- Checks and Coverage
- Assertions
- Pool
Transactions
- Transaction content
- Data, address, Attributes, Opcode, Response,
- Data types:
- memory -> scalar, bytes, integers,
- Data path:
- Scalar
- Transaction Item Class
- Transaction ordering
- FIFO
- OOO
- Precedence relationship
- Test Data/Transactions -> Item of Sequences -> Sequences -> Sequencer -> Driver -> VIF -> DUT
- DUT -> monitor -> Analysys_ports -> Scoreboard
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